EP910LI-35T vs EP910LC-30T 比較
詳細な並列比較: EP910LI-35T メーカー: Intel および EP910LC-30T メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP910LI-35T | EP910LC-30T |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | ラストバイ | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $28.50 | $7.10 |
| Family | Classic EPLD (EP910) | — |
| Logic Elements | 24 macrocells | — |
| Usable Gates | 450 | 450 |
| Propagation Delay (tPD) | 35 ns | 30 ns |
| Maximum Toggle Frequency (fMAX) | 28.6 MHz | — |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | 5 V (4.75 V to 5.25 V) |
| Technology | CMOS, EPROM-based | CMOS, UV-erasable / OTP |
| パッケージ | 44-pin PLCC (JEDEC) | 44-pin PLCC (J-lead) |
| 動作温度 | -40C to +85C (industrial, 'I' suffix) | [DATA_NEEDED: operating temperature] |
| 実装タイプ | Surface Mount / Socket | Surface Mount |
| Programming Method | EPROM (UV-erasable for windowed versions) | — |
| Data Retention | [DATA_NEEDED: data retention years] | — |
| Number of I/O Pins | [DATA_NEEDED: I/O pin count] | — |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance] | unknown |
| Lead-Free | [DATA_NEEDED: lead-free status] | unknown |
| Part Number | — | EP910LC-30T |
| Manufacturer | — | Altera (Rochester Electronics) |
| Device Family | — | Classic EPLD |
| Macrocells | — | 24 |
| Maximum Operating Frequency | — | 33.3 MHz |
| User I/O Pins | — | 36 |
| Programmable Pins | — | Bidirectional, tri-state |
| Programming Interface | — | Altera MAX+PLUS II |