EP910PC-0 vs EP910IPC-25 比較
詳細な並列比較: EP910PC-0 メーカー: Altera および EP910IPC-25 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EP910PC-0 | EP910IPC-25 |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $8.70 | $10.40 |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Family | Classic EPLD | Classic EPLD (EP910 series) |
| Usable Gates | 900 gates | 450 |
| Macrocells | 24 | 24 |
| Logic Blocks | 6 (4 macrocells each) | — |
| Dedicated Inputs | 10 | 12 |
| I/O Pins | 24 | — |
| パッケージ | PDIP-40 (Plastic DIP, 40-pin) | 40-pin PDIP (PDIP-40) |
| Speed Grade | -0 (slowest) | — |
| 電源電圧 | 5 V (single supply) | — |
| Process Technology | CMOS | — |
| Logic Compatibility | 100% TTL emulation | — |
| 動作温度 | 0C to +70C (commercial) | 0C to +70C (commercial grade) |
| Programming Method | UV-erasable / OTP | EPROM cell (OTP / UV erasable) |
| 実装タイプ | Through-Hole (DIP) | Through-Hole |
| Manufacturer | — | Altera (now Intel) |
| Architecture | — | PAL-type EPLD, CMOS, UV/OTP |
| Product Terms | — | 240 |
| Propagation Delay (tPD) | — | 25 ns |
| Maximum Frequency (fMAX) | — | 40 MHz |
| Bidirectional I/O Lines | — | 24 |
| Total Inputs (max) | — | 36 |
| Total Outputs (max) | — | 24 |
| Supply Voltage (VCC) | — | 5 V |
| Development Tool | — | MAX+PLUS II |