EPC1PC8CC vs EPC1PC8N 比較
詳細な並列比較: EPC1PC8CC メーカー: Intel および EPC1PC8N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPC1PC8CC | EPC1PC8N |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | Memory ICs | Memory ICs |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $9.95 | $4.40 |
| メモリサイズ | 1 Mbit (1,048,576 bits) | 1 Mbit |
| メモリタイプ | EPROM (OTP, UV-erasable window optional) | OTP (One-Time Programmable) Configuration PROM |
| 機能 | FPGA Configuration PROM | — |
| Configuration Interface | Altera Passive Serial (PS), 4-wire (nSTATUS, nCONFIG, DCLK, DATA0) | — |
| Supply Voltage VCC | 3.0 V to 3.6 V (typical 3.3 V) | — |
| Maximum DCLK Frequency | 17.6 MHz (17.6 Mb/s effective bitstream rate) | — |
| 動作温度範囲 | [DATA_NEEDED: full industrial range from datasheet] | — |
| パッケージ | PDIP-8 (Plastic DIP, 8-pin, 0.1" pitch) | 8-pin PDIP (PC8N suffix) |
| 実装タイプ | Through-Hole (DIP socketable) | Through-Hole |
| Cascade Support | Not supported in DIP-8 package (nCASC pin not exposed) | — |
| Programming Interface | JTAG via Altera Quartus / Quartus Prime ByteBlaster | — |
| Error Detection | Built-in CRC during configuration transfer | — |
| MSLレベル | 1 (unlimited floor life) | — |
| Lead-Free / RoHS | Not lead-free (legacy Altera/Intel PC8 suffix is Sn-Pb finish); RoHS non-compliant variant | — |
| Compatible FPGA Families | ACEX 1K, APEX 20K, APEX II, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, FLEX 8000, MAX 7000B/AE/S, MAX 9000, Mercury, Stratix, Stratix II, Arria | — |
| ピン数 | 8 | — |
| メモリ構成 | — | Serial (DCLK + DATA) |
| 電源電圧 | — | 3.0 V to 3.6 V |
| Supply Voltage (Typical) | — | 3.3 V |
| インターフェース | — | Altera PS Serial / JTAG (IEEE 1149.1) |
| Programmability | — | In-system via JTAG; OTP after programming |
| Standby Current | — | [DATA_NEEDED: standby current uA] |
| Active Current | — | [DATA_NEEDED: active current mA] |
| 動作温度 | — | [DATA_NEEDED: operating temperature range C] |
| RoHS ステータス | — | Compliant (PC8N suffix indicates lead-free) |
| Configuration Mode | — | Serial (PS mode) |
| JTAG Compliance | — | IEEE Std. 1149.1-1990 boundary-scan |