EPC4QC1C00N vs EPC4Q100T 比較
詳細な並列比較: EPC4QC1C00N メーカー: Altera および EPC4Q100T メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPC4QC1C00N | EPC4Q100T |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | NRND |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $9.10 | $9.75 |
| Device Family | Enhanced Configuration Device (EPC4) | — |
| Memory Density | 4 Mbit (4,194,304 bits) | — |
| Supply Voltage (VCC) | 3.0 V to 3.6 V (3.3 V typical) | — |
| I/O Voltage Tolerance | 3.3 V / 5 V tolerant | 3.3 V (5 V tolerant on legacy interface pins) |
| Interface to FPGA | Serial DATA, DCLK, nCONFIG, nSTATUS, CONF_DONE | — |
| Configuration Data Width | 4-bit multiplexed on single DATA pin | — |
| パッケージ | 100-pin PQFP (QFP-100) | — |
| 動作温度 | -40 C to +85 C (industrial) | — |
| In-System Programming | JTAG (IEEE 1149.1) | Yes (JTAG IEEE 1149.1) |
| Programming Voltage | On-chip generated, no external VPP | — |
| Page Mode | Yes, multi-page storage supported | — |
| Target FPGA Families | Stratix, Cyclone, APEX, Mercury, ACEX | — |
| Configuration Clock (DCLK) | [DATA_NEEDED: DCLK max frequency] | — |
| MSLレベル | 3 (per JEDEC J-STD-020) | — |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| メモリサイズ | — | 4 Mbit |
| メモリタイプ | — | Flash (non-volatile) |
| 機能 | — | Enhanced Configuration Device for SRAM-based LUT FPGAs |
| Configuration Modes Supported | — | PS, FPP (16-bit), AS |
| Flash Access Time | — | 90 ns (approx 10 MHz core clock) |
| Maximum Configuration Data Rate | — | 160 Mbps (FPP, 16-bit bus) |
| データバス幅 | — | 16-bit (DQ[15:0]) |
| Supply Voltage (Core) | — | 3.3 V |
| Package Type | — | PQFP-100 (Plastic Quad Flat Pack) |
| Package Dimensions | — | 20 x 14 mm |
| 動作温度範囲 | — | [DATA_NEEDED: operating temperature range] |
| Compatible FPGA Families | — | Stratix, Cyclone, APEX, Mercury, ACEX |
| Manufacturer | — | Intel (formerly Altera) |