EPF10K100BQC208-2 vs EPF10K100EQC208-1 比較
詳細な並列比較: EPF10K100BQC208-2 メーカー: Altera および EPF10K100EQC208-1 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPF10K100BQC208-2 | EPF10K100EQC208-1 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $82.00 | $220.00 |
| Series | FLEX-10K | FLEX 10KE |
| Manufacturer | Altera (Intel) | — |
| Logic Elements / Cells | 4,992 | — |
| Total RAM Bits | 24,576 (6,144 user bits cited) | 49,152 |
| Number of EABs | 12 | — |
| Number of Gates (typical) | 100,000 | — |
| Supply Voltage (Vcc) | 4.75 V to 5.25 V | — |
| 動作温度 | 0C to +70C (Commercial) | 0 C to 70 C (commercial) |
| Speed Grade | -2 | — |
| パッケージ | 208-BFQFP / PQFP (28 x 28 mm) | 208-BFQFP (PQFP 28x28 mm) |
| 実装タイプ | Surface Mount | Surface Mount |
| Process Technology | 0.42 µm CMOS SRAM | — |
| User I/O Pins | 148 (approx.) | — |
| Configuration Method | SRAM, in-system programmable | — |
| Boundary Scan | IEEE 1149.1 (JTAG) compliant | — |
| RoHS ステータス | Unknown (legacy part, pre-RoHS transition for many PQFP variants) | [DATA_NEEDED: RoHS compliance per Altera product label] |
| Lead-Free | Unknown | — |
| Logic Elements | — | 4,992 |
| Typical Gates | — | 100,000 |
| Number of LABs/CLBs | — | 624 |
| Number of I/O | — | 147 |
| Package Pin Count | — | 208 |
| Core Supply Voltage | — | 2.375 V to 2.625 V (2.5 V nominal) |
| I/O Supply Voltage | — | 3.3 V (multi-voltage I/O) |
| Logic Family | — | CMOS (SRAM-based) |
| Propagation Delay | — | 0.6 ns |
| Configuration | — | SRAM (volatile, in-system programmable) |
| JTAG Support | — | Yes (IEEE 1149.1 boundary scan) |