EPF10K100BQC208-2 vs EPF10K100EQI208-2 比較
詳細な並列比較: EPF10K100BQC208-2 メーカー: Altera および EPF10K100EQI208-2 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPF10K100BQC208-2 | EPF10K100EQI208-2 |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $82.00 | $9.95 |
| Series | FLEX-10K | — |
| Manufacturer | Altera (Intel) | — |
| Logic Elements / Cells | 4,992 | 4,992 |
| Total RAM Bits | 24,576 (6,144 user bits cited) | — |
| Number of EABs | 12 | — |
| Number of Gates (typical) | 100,000 | — |
| Supply Voltage (Vcc) | 4.75 V to 5.25 V | — |
| 動作温度 | 0C to +70C (Commercial) | 0°C to 70°C (commercial) |
| Speed Grade | -2 | I (industrial temp), -2 timing |
| パッケージ | 208-BFQFP / PQFP (28 x 28 mm) | 208-pin PQFP (BFQFP) |
| 実装タイプ | Surface Mount | — |
| Process Technology | 0.42 µm CMOS SRAM | 0.22 µm CMOS |
| User I/O Pins | 148 (approx.) | — |
| Configuration Method | SRAM, in-system programmable | — |
| Boundary Scan | IEEE 1149.1 (JTAG) compliant | — |
| RoHS ステータス | Unknown (legacy part, pre-RoHS transition for many PQFP variants) | [DATA_NEEDED: rohs status] |
| Lead-Free | Unknown | — |
| Family | — | FLEX 10KE |
| Typical Gates | — | 100,000 |
| Embedded Memory (bits) | — | 49,152 |
| Logic Array Blocks (LABs) | — | 624 |
| User I/Os | — | 147 |
| Core Supply Voltage | — | 2.5 V |
| Propagation Delay | — | 0.6 ns |
| Maximum Internal Frequency | — | 250 MHz |
| I/O Standards | — | 2.5 V / 3.3 V / 5 V tolerant |
| Configuration Interface | — | JTAG (IEEE 1149.1) / serial / parallel |
| Programming Method | — | In-system programmable (ISP) / SRAM-based |
| PCI Compliant | — | Yes |