EPF10K100EQI208-2 vs EPF10K100EQI208-2N 比較
詳細な並列比較: EPF10K100EQI208-2 メーカー: Intel および EPF10K100EQI208-2N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPF10K100EQI208-2 | EPF10K100EQI208-2N |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | NRND |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $9.95 | $26.40 |
| Family | FLEX 10KE | FLEX 10KE |
| Logic Elements / Cells | 4,992 | — |
| Typical Gates | 100,000 | 100,000 |
| Embedded Memory (bits) | 49,152 | — |
| Logic Array Blocks (LABs) | 624 | 624 |
| User I/Os | 147 | — |
| パッケージ | 208-pin PQFP (BFQFP) | 208-pin PQFP (Power Quad Flat Pack), gull-wing |
| Process Technology | 0.22 µm CMOS | 0.22 µm CMOS |
| Core Supply Voltage | 2.5 V | — |
| Propagation Delay | 0.6 ns | — |
| Maximum Internal Frequency | 250 MHz | 250 MHz |
| 動作温度 | 0°C to 70°C (commercial) | 0 °C to +70 °C (industrial -40 °C to +85 °C per -I suffix) |
| Speed Grade | I (industrial temp), -2 timing | — |
| I/O Standards | 2.5 V / 3.3 V / 5 V tolerant | — |
| Configuration Interface | JTAG (IEEE 1149.1) / serial / parallel | JTAG (IEEE 1149.1) + serial passive/active |
| Programming Method | In-system programmable (ISP) / SRAM-based | — |
| PCI Compliant | Yes | — |
| RoHS ステータス | [DATA_NEEDED: rohs status] | [DATA_NEEDED: rohs status] |
| Maximum System Gates | — | 199,000 |
| Logic Elements (LEs) | — | 4,992 |
| Embedded Array Blocks (EABs) | — | 12 |
| Total RAM Bits | — | 24,576 |
| Maximum User I/O Pins | — | 147 |
| Supply Voltage Core (VCCINT) | — | 2.5 V |
| Propagation Delay (typ.) | — | 0.6 ns |