EPF10K200SFI672-2 vs EPF10K200SFC672-1X 比較
詳細な並列比較: EPF10K200SFI672-2 メーカー: Intel および EPF10K200SFC672-1X メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPF10K200SFI672-2 | EPF10K200SFC672-1X |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $99.50 | $135.00 |
| Family | FLEX 10KE | FLEX 10K (legacy) |
| Logic Elements | 9984 | — |
| System Gates | 200000 | — |
| Logic Array Blocks (LABs) | 1248 | 1,248 |
| User I/Os | 470 | — |
| Embedded Array Blocks (EABs) | 24 | 24 |
| Embedded Memory (EAB SRAM) | 96 Kbit | — |
| Distributed Memory | 98304 bits | — |
| Process Technology | 0.22 µm (Arrow lists 0.42 µm) | — |
| Core Supply Voltage | 2.5 V | 2.375 V to 2.625 V (2.5 V nominal) |
| パッケージ | 672-pin FineLine BGA (FBGA) | 672-ball FineLine BGA, 27 × 27 mm, 1.0 mm pitch |
| Speed Grade | -2 | — |
| 動作温度 | Industrial (-40C to +85C) | 0 °C to 70 °C (Commercial) |
| JTAG Boundary Scan | IEEE Std. 1149.1-1990 compliant | — |
| PCI Compliance | PCI Local Bus Specification Rev 2.2 (3.3 V, 33/66 MHz) on -1 speed grade | — |
| Programming | SRAM-based, in-system programmable | — |
| RoHS ステータス | Not compliant (per Arrow EU RoHS listing) | [DATA_NEEDED: RoHS compliance status] |
| Series | — | FLEX-10KS |
| Architecture | — | Reconfigurable CMOS SRAM |
| Typical System Gates | — | 200,000 |
| Maximum System Gates | — | [DATA_NEEDED: maximum system gate count] |
| Logic Elements (LEs) | — | 9,984 |
| Embedded RAM Bits | — | 98,304 |
| User I/O Pins | — | 470 |
| Propagation Delay | — | 0.4 ns |
| JTAG Support | — | IEEE Std. 1149.1 (adds up to 31,250 gates) |
| 実装タイプ | — | Surface Mount |
| Logic Family | — | CMOS |
| Configuration Method | — | SRAM (volatile, reconfigurable at every power-up) |
| Design Tool | — | Quartus (legacy FLEX 10K support) |