EPF10K30EFC484-1 vs EPF10K100EFC484-1 比較
詳細な並列比較: EPF10K30EFC484-1 メーカー: Altera および EPF10K100EFC484-1 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPF10K30EFC484-1 | EPF10K100EFC484-1 |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $67.00 | $142.00 |
| Series | FLEX 10KE | — |
| Typical Gates | 30,000 | — |
| Maximum System Gates | 119,000 | — |
| Logic Elements | 1728 | — |
| Logic Array Blocks (LABs) | 216 | — |
| Embedded RAM | 24,576 bits | — |
| Embedded Array Blocks (EABs) | 6 | — |
| User I/Os | 220 | 338 |
| Internal Frequency | 80 MHz | — |
| Propagation Delay | 0.6 ns (typical pin-to-pin) | 0.6 ns |
| 動作温度 | 0C to 70C (Commercial) | 0 °C to 70 °C (commercial) |
| パッケージ | 484-FBGA (FineLine BGA, 23x23) | 484-FBGA (FineLine BGA, 23×23 mm) |
| 実装タイプ | Surface Mount | Surface Mount (SMT) |
| I/O Standard Support | MultiVolt (2.5V/3.3V/5.0V) via VCCIO banks | — |
| JTAG Boundary Scan | IEEE 1149.1 compliant | — |
| Process Node | [DATA_NEEDED: process node] | — |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance] | Non-compliant (per Arrow listing) |
| Family | — | FLEX 10KE |
| Logic Elements / Cells | — | 4,992 |
| Number of LABs/CLBs | — | 624 |
| Total RAM Bits | — | 49,152 |
| Embedded Memory (Kbits) | — | 48 (12 EABs) |
| Number of Block RAM (EABs) | — | 12 |
| Total Gates | — | 257,000 typical system gates |
| Operating Supply Voltage (Core) | — | 2.5 V |
| Operating Supply Voltage Range | — | 2.375 V to 2.625 V |
| Process Technology | — | 0.42 µm CMOS |
| Program Memory Type | — | SRAM (volatile) |
| Configuration Interface | — | JTAG (IEEE 1149.1), serial/parallel EPROM |
| PCI Support | — | 3.3 V PCI compliant |
| ライフサイクル状態 | — | Obsolete (EOL) |