EPF10K30RC240-3 vs EPF10K50RC240-3 比較
詳細な並列比較: EPF10K30RC240-3 メーカー: Altera および EPF10K50RC240-3 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPF10K30RC240-3 | EPF10K50RC240-3 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $95.00 | $58.75 |
| Family | FLEX 10K | Flex 10K |
| Typical Gates | 30,000 | — |
| Logic Elements (LEs) | 1,728 | — |
| Logic Array Blocks (LABs) | 216 | 360 |
| Embedded Array Blocks (EABs) | 6 | 10 (per family) |
| Total RAM Bits | 12,288 | — |
| User I/O Pins | 189 | — |
| Process Technology | 0.42 um CMOS, SRAM-based | — |
| Core Supply Voltage | 5.0 V (VCCINT) | — |
| I/O Supply Voltage | 3.3 V or 5.0 V (multiVolt I/O) | — |
| Maximum Internal Frequency | 125 MHz (speed grade -3) | 125 MHz |
| Propagation Delay | 0.6 ns typical | 0.6 ns (typical, per family) |
| パッケージ | 240-RQFP / 240-BFQFP Exposed Pad | 240-RQFP (RQFP-240 with Exposed Pad) |
| 動作温度 | 0C to +70C (Commercial) | 0 C to +70 C (commercial) |
| Configuration Method | Serial / parallel PROM, JTAG | JTAG / EPC configuration device |
| JTAG Support | Yes (IEEE 1149.1 boundary scan) | — |
| 実装タイプ | Surface Mount | Surface Mount |
| RoHS ステータス | Contains lead (non-RoHS) | [DATA_NEEDED: RoHS Status] |
| Series | — | FLEX 10K |
| Logic Cells | — | 2,880 |
| Usable Gates (typical) | — | 50,000 |
| Total Gates (max) | — | 116,000 (per family) |
| User I/Os | — | 189 |
| Supply Voltage (Core) | — | 5 V |
| Technology | — | CMOS |
| Programming Tool Support | — | MAX+PLUS II / Quartus (legacy) |
| MSLレベル | — | [DATA_NEEDED: MSL Level] |
| Lead-Free | — | [DATA_NEEDED: Lead-Free Status] |