EPF6016AQC208-3S vs EPF6016QC208 比較
詳細な並列比較: EPF6016AQC208-3S メーカー: Intel および EPF6016QC208 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPF6016AQC208-3S | EPF6016QC208 |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | NRND |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $27.90 | $23.50 |
| Series | FLEX 6000 | — |
| Device Type | Field-Programmable Gate Array (FPGA) | — |
| Typical Gates | 16,000 | — |
| Logic Elements | 1,320 | — |
| Logic Array Blocks (LABs) | 132 | 132 LABs (10 LEs per LAB) |
| User I/O Pins | 171 | — |
| Package Type | 208-PQFP (Plastic Quad Flat Pack) | — |
| Package Code | FQFP, 28x28 mm, 0.5 mm pitch | — |
| Supply Voltage - Core | 3.3 V | — |
| Supply Voltage - Operating | 3.0 V to 3.6 V | — |
| Operating Temperature (TJ) | 0C to 85C | — |
| Configuration Memory | SRAM (volatile, requires external PROM) | SRAM (volatile, requires external config EPROM) |
| I/O Standards | 3.3V LVCMOS/LVTTL, 5V tolerant inputs | — |
| JTAG Support | IEEE 1149.1 Boundary-Scan | IEEE Std 1149.1 boundary scan |
| 実装タイプ | Surface Mount | Surface Mount |
| RoHS ステータス | [DATA_NEEDED: confirm RoHS compliance status] | Non-compliant (legacy 5V PQFP, contains lead) |
| Speed Grade | -3 (highest speed in family) | — |
| Family | — | FLEX 6000 |
| Equivalent Gates | — | 16,000 gates |
| Logic Cells / Logic Elements (LEs) | — | 1,320 LEs |
| Maximum User I/O | — | 171 I/O pins |
| Maximum Internal Frequency | — | 125 MHz |
| Process Technology | — | 0.42 um CMOS (SRAM-based) |
| Supply Voltage (VCCINT) | — | 5.0 V |
| I/O Standard Support | — | 5.0 V CMOS (3.3 V VCCIO supported) |
| パッケージ | — | PQFP-208 (Plastic Quad Flat Pack) |
| ピン数 | — | 208 pins |
| 動作温度 | — | 0C to 70C (commercial) |
| Configuration Device Compatibility | — | EPC1, EPC2 (legacy Altera config PROMs) |