EPF6024ATC144-17 vs EPF6024ATC144-13 比較
詳細な並列比較: EPF6024ATC144-17 メーカー: Intel および EPF6024ATC144-13 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPF6024ATC144-17 | EPF6024ATC144-13 |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $9.75 | $7.10 |
| Family | FLEX 6000 | FLEX 6000 |
| Logic Elements | 1960 | — |
| Logic Array Blocks (LABs) | 196 | 196 |
| User I/O Pins | 117 | — |
| Configuration Memory | SRAM (volatile) | — |
| パッケージ | 144-pin TQFP (TQFP-144) | 144-pin LQFP (TQFP) |
| Speed Grade | -17 | -13 (≈13 ns pin-to-pin delay) |
| 動作温度 | Commercial (0C to +70C junction) | -40C to +85C (commercial/industrial) |
| Core Voltage | 3.3 V | — |
| I/O Voltage Support | 1.8 V / 2.5 V / 3.3 V / 5.0 V PCI-compatible | — |
| Logic Element Structure | 4-input LUT + flip-flop | — |
| LEs per LAB | 10 | — |
| Configuration Modes | Passive Serial, Passive Parallel Async, JTAG | — |
| Boundary Scan | IEEE 1149.1 JTAG compliant | — |
| 実装タイプ | Surface Mount | Surface Mount |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | unknown |
| MSLレベル | [DATA_NEEDED: MSL rating] | — |
| Process Technology | — | 0.42 µm CMOS |
| Typical Gates | — | 24,000 |
| Logic Elements / Cells | — | 1,960 |
| Maximum User I/O | — | 117 |
| Core Supply Voltage | — | 3.3 V |
| I/O Supply Voltage | — | 3.3 V (5 V tolerant I/O) |
| Maximum Internal Frequency | — | 142.86 MHz |
| Programmable Logic Type | — | SRAM-based FPGA, in-system programmable |
| Configuration Interface | — | Serial EPROM (EPC1/EPC2) and JTAG |
| Architecture | — | 4-input LUT-based LE with carry chain and EAB memory blocks |