EPF8820ARI208-2N vs EPF8820ARI208-4H 比較
詳細な並列比較: EPF8820ARI208-2N メーカー: Altera および EPF8820ARI208-4H メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPF8820ARI208-2N | EPF8820ARI208-4H |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $99.50 | $22.75 |
| Family | FLEX 8000 | FLEX 8000 |
| Usable Gates | 8,820 | 8,000 |
| Logic Elements | 504 | — |
| Maximum User I/O | 78 | — |
| LABs (Logic Array Blocks) | 63 | — |
| Logic Elements per LAB | 8 | — |
| Speed Grade | -2 (mid-tier) | — |
| パッケージ | 208-pin RQFP (Plastic Quad Flat Pack) | 208-pin Plastic Quad Flatpack (RQFP / PQFP), 0.5 mm pitch, gull-wing |
| 実装タイプ | Surface Mount | — |
| Core Supply Voltage | 5.0 V | — |
| 動作温度 | 0C to +70C (commercial) / -40C to +85C (industrial) | — |
| Programming Technology | SRAM (volatile, requires configuration device) | — |
| Boundary Scan | IEEE 1149.1 (JTAG) compliant | — |
| Configuration Method | Passive serial / JTAG / Altera EPC configuration device | — |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance per specific date code] | [DATA_NEEDED: rohs status] |
| Lead-Free | Yes (N suffix indicates lead-free assembly) | — |
| Device Type | — | Loadable PLD / SRAM-based FPGA |
| Logic Elements / Cells | — | 672 |
| Flip-Flops | — | 820 |
| Embedded Array Blocks (EABs) | — | 8 (2 Kbit each) |
| Total Inputs | — | 152 (4 dedicated + 148 I/O) |
| I/O Lines | — | 148 |
| Propagation Delay (tpd) | — | 5.5 ns (speed grade -4) |
| Maximum Internal Frequency | — | 125 MHz |
| Process Technology | — | 0.42 um CMOS, SRAM-based |
| Supply Voltage (VCCINT) | — | 4.5 V to 5.5 V (nominal 5 V) |
| I/O Standard Support | — | 3.3 V or 5 V configurable |
| Operating Temperature Grade | — | Industrial |
| Terminal Form | — | Gull Wing (Surface Mount) |
| Package Code | — | FQFP |
| Programming Method | — | SRAM (in-system) via JTAG / EPC |
| Status | — | Obsolete / NRND |