EPM1270F256I5N vs EPM2210F256C4N 比較
詳細な並列比較: EPM1270F256I5N メーカー: Intel および EPM2210F256C4N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM1270F256I5N | EPM2210F256C4N |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $14.85 | $39.85 |
| Series | MAX II | — |
| Family | MAX II (EPM1270) | MAX II |
| Device Type | CPLD - Complex Programmable Logic Device | CPLD |
| Macro Cells | 980 | 1700 |
| Logic Elements | 1270 | — |
| User I/O Pins | 212 | — |
| User Flash Memory | 8 Kbits | 204 Kbit |
| Maximum Operating Frequency | 201.1 MHz | — |
| Pin-to-Pin Logic Delay | 6.2 ns (I5 speed grade) | — |
| External Supply Voltage | 2.5 V / 3.3 V | — |
| Internal Core Voltage | 1.8 V (on-chip regulator) | — |
| I/O Bank Support | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) + 3.3 V PCI-compliant bank | — |
| Process Technology | 0.18-micron Flash-based CMOS | 0.18 µm |
| Configuration Memory | Non-volatile Flash (instant-on) | — |
| Programming Interface | JTAG IEEE 1149.1 (boundary-scan + ISP) | JTAG IEEE Std. 1149.1 + ISP |
| パッケージ | 256-ball FBGA (FineLine BGA), 17 x 17 mm | 256-ball FineLine BGA (FBGA) |
| 動作温度 | -40C to +100C (TJ), industrial | — |
| Speed Grade | I5 (industrial, 6.2 ns tPD) | — |
| 実装タイプ | Surface Mount (SMT, BGA) | Surface Mount (BGA) |
| RoHS ステータス | Compliant | Compliant |
| ハロゲンフリー | Compliant (per GlobalSpec) | — |
| Country of Origin | Malaysia / Republic of Korea | — |
| Logic Elements (LE) | — | 2210 |
| Maximum Internal Frequency | — | 247.5 MHz |
| Pin-to-Pin Propagation Delay (tPD) | — | 7.0 ns |
| Maximum User I/O Pins | — | 212 (varies with package) |
| Global Clock Networks | — | 4 |
| Core Supply Voltage | — | 3.0 V to 3.6 V (3.3 V typical) |
| MultiVolt I/O Standards | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V LVTTL/LVCMOS, PCI 66 MHz |
| 動作温度範囲 | — | 0 °C to +85 °C (Commercial) |
| Lead-Free | — | Yes |