EPM240GM100C5N vs EPM240M100C4N 比較
詳細な並列比較: EPM240GM100C5N メーカー: Altera および EPM240M100C4N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Altera
EPM240GM100C5N - 192-Cell MAX II G CPLD, 4.7ns, 100-MBGA | Intel / Altera
EPM240GM100C5N ✓ 生産中仕様比較
| パラメータ | EPM240GM100C5N | EPM240M100C4N |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $4.75 | $7.45 |
| Family | MAX II G | — |
| Logic Elements | 240 (192 macrocells) | — |
| User I/Os | 80 | 80 |
| Pin-to-Pin Delay (tPD) | 4.7 ns | — |
| パッケージ | 100-MBGA (Micro FineLine BGA), 6 x 6 mm | 100-pin Micro FineLine BGA (MBGA), 6 x 6 mm, 0.5 mm pitch |
| Ball Pitch | 0.5 mm | — |
| Supply Voltage - Core | 3.3 V | 2.5 V / 3.3 V |
| I/O Voltage Support | 1.5 V / 1.8 V / 2.5 V / 3.3 V (multiVolt) | — |
| Programming Interface | JTAG (IEEE 1149.1) - ISP | — |
| Configuration Memory | Non-volatile Flash | Non-volatile on-chip flash (instant-on) |
| 動作温度 | -40 C to +125 C | -40 C to +125 C (industrial) |
| Lead Free / RoHS | Yes / Compliant | — |
| MSLレベル | 3 | — |
| 実装タイプ | Surface Mount (BGA) | Surface Mount (BGA) |
| Process Technology | CMOS, Flash-based | — |
| Series | — | MAX II |
| Device Family | — | EPM240 |
| Macro Cells | — | 192 |
| Propagation Delay (tPD) Max | — | 4.7 ns |
| Internal Operating Frequency | — | 247.5 MHz |
| I/O Standards Supported | — | 1.5 V, 1.8 V, 2.5 V, 3.3 V LVCMOS/LVTTL |
| User Flash Memory | — | 8 Kbit |
| Programmability | — | In-System Programmable via JTAG (IEEE 1149.1) |
| Logic Family | — | CMOS |
| RoHS ステータス | — | Lead Free (per DigiChip spec sheet) |
| Logic Array Blocks (LABs) | — | 4 (16 macrocells per LAB) |
| MultiTrack Interconnect | — | Yes |
| Hot Socketing | — | Yes |