EPM240GT100-5N vs EPM240GT100C4 比較
詳細な並列比較: EPM240GT100-5N メーカー: Altera および EPM240GT100C4 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM240GT100-5N | EPM240GT100C4 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $3.65 | $6.50 |
| Series | MAX II | — |
| Logic Elements | 240 | — |
| Macrocells | 192 | — |
| User Flash Memory | 8 Kbits (8192 bits) | — |
| Maximum User I/O | 80 | — |
| Pin-to-Pin Delay (tPD) | 4.7 ns (speed grade 5) | 4.7 ns |
| Maximum Operating Frequency | 100 MHz | — |
| Process Technology | 0.18 µm, 6-layer metal Flash | 0.18-µm, 6-layer-metal flash CMOS |
| パッケージ | TQFP-100 (14x14 mm, 0.5 mm pitch) | 100-TQFP (TQFP-100), 16 x 16 mm, 0.5 mm pitch |
| 実装タイプ | Surface Mount | Surface Mount (Gull-Wing leads) |
| Supply Voltage (VCCINT) | 3.0 V to 3.6 V | — |
| I/O Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | — |
| 動作温度 | 0C to +85C (commercial) | — |
| Programming Interface | IEEE 1149.1 JTAG (in-system programmable) | JTAG (IEEE 1149.1) / In-System Programmable (ISP) |
| Configuration Memory | On-chip non-volatile Flash (instant-on) | — |
| RoHS ステータス | Compliant | — |
| MSLレベル | 3 (168 hours) | — |
| Family | — | MAX II |
| Logic Elements (LE) | — | 240 |
| Equivalent Macrocells | — | 192 |
| Propagation Delay | — | 6.1 ns (max) |
| User I/O Pins (max) | — | 80 |
| On-chip Flash Memory (UFM) | — | 8 Kbits |
| I/O Standards Supported | — | 1.5 V, 1.8 V, 2.5 V, 3.3 V (MultiVolt) |
| 動作温度範囲 | — | 0°C to +85°C (Commercial) |
| Supply Voltage (Core) | — | 3.3 V |
| Lead-Free / RoHS | — | Lead-Free (per FindIC entry); RoHS compliance [DATA_NEEDED: verify against manufacturer datasheet] |