EPM240T100C4 vs EPM240GT100C4 比較
詳細な並列比較: EPM240T100C4 メーカー: Intel および EPM240GT100C4 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM240T100C4 | EPM240GT100C4 |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $8.20 | $6.50 |
| Series | MAX II | — |
| Programmable Type | In System Programmable | — |
| Number of Macrocells | 192 | — |
| Number of Logic Elements/Blocks | 240 | — |
| Number of User I/O | 80 | — |
| Maximum Propagation Delay (tPD) | 4.7 ns | — |
| Internal Supply Voltage | 2.5 V / 3.3 V | — |
| I/O Bank Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | — |
| Process Technology | 0.18 µm CMOS, non-volatile Flash | 0.18-µm, 6-layer-metal flash CMOS |
| User Flash Memory | 8 Kbits (typical) | — |
| パッケージ / ケース | 100-pin TQFP | — |
| 実装タイプ | Surface Mount | Surface Mount (Gull-Wing leads) |
| 動作温度 | 0 °C to +85 °C (TJ, commercial) | — |
| Programming Interface | JTAG (IEEE 1149.1) - ISP | JTAG (IEEE 1149.1) / In-System Programmable (ISP) |
| Supplier Device Package | 100-TQFP (16 × 16 mm, 0.5 mm pitch) | — |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | — |
| MSLレベル | [DATA_NEEDED: MSL level] | — |
| Family | — | MAX II |
| Logic Elements (LE) | — | 240 |
| Equivalent Macrocells | — | 192 |
| Pin-to-Pin Delay (tPD) | — | 4.7 ns |
| Propagation Delay | — | 6.1 ns (max) |
| User I/O Pins (max) | — | 80 |
| On-chip Flash Memory (UFM) | — | 8 Kbits |
| パッケージ | — | 100-TQFP (TQFP-100), 16 x 16 mm, 0.5 mm pitch |
| I/O Standards Supported | — | 1.5 V, 1.8 V, 2.5 V, 3.3 V (MultiVolt) |
| 動作温度範囲 | — | 0°C to +85°C (Commercial) |
| Supply Voltage (Core) | — | 3.3 V |
| Lead-Free / RoHS | — | Lead-Free (per FindIC entry); RoHS compliance [DATA_NEEDED: verify against manufacturer datasheet] |