EPM240T100I5N vs EPM240T100C5N 比較
詳細な並列比較: EPM240T100I5N メーカー: Intel および EPM240T100C5N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM240T100I5N | EPM240T100C5N |
|---|---|---|
| ブランド | Intel | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $4.68 | $4.65 |
| Series | MAX II | — |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Logic Elements (LE) | 240 | — |
| Macrocells | 192 | — |
| User I/O Pins | 80 | — |
| On-chip User Flash Memory (UFM) | 8 Kbits | — |
| Process Technology | 0.18 µm, 6-layer-metal flash | 0.18 µm, 6-layer-metal flash |
| パッケージ | TQFP-100 | 100-pin TQFP (T100), 14x14 mm |
| 実装タイプ | Surface Mount | Surface Mount |
| Core Supply Voltage (VCCINT) | 3.0 V to 3.6 V (3.3 V nominal) | 2.5 V / 3.3 V |
| I/O Bank Supply (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | — |
| Typical Propagation Delay (tPD) | 7 ns (approx., I5 speed grade) | — |
| 動作温度範囲 | -40 °C to +100 °C (industrial, I-temp) | — |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | JTAG (IEEE 1149.1) / ISP |
| RoHS ステータス | Compliant | Compliant (lead-free) |
| Configuration Storage | Non-volatile flash (instant-on, no external PROM) | — |
| Family | — | MAX II |
| Logic Elements (LEs) | — | 240 |
| Equivalent Macrocells | — | 192 |
| On-Chip User Flash | — | 8 Kbits |
| Maximum User I/O Pins | — | 80 |
| Number of I/O Banks | — | 4 |
| Pin-to-Pin Delay (speed grade 5) | — | 4.7 ns |
| Maximum Internal Frequency | — | 201.1 MHz |
| I/O Supply Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) |
| 動作温度 | — | 0 °C to +85 °C (commercial, 'C' suffix) |