EPM3032ALC44-10N vs EPM3032ATI44-10N 比較
詳細な並列比較: EPM3032ALC44-10N メーカー: Altera および EPM3032ATI44-10N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM3032ALC44-10N | EPM3032ATI44-10N |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $0.94 | $5.10 |
| Family | MAX 3000A | MAX 3000A |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Logic Gates | 600 gates | — |
| Macrocells | 32 | — |
| Logic Array Blocks (LABs) | 2 | — |
| User I/O Pins | 34 | — |
| Propagation Delay (tPD) | 10 ns | — |
| Internal fMAX | 103.1 MHz | — |
| Supply Voltage (VCCINT) | 3.3 V | 3.0 V to 3.6 V (3.3 V typical) |
| I/O Voltage (VCCIO) | 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt I/O) | — |
| Technology | CMOS EEPROM-based | — |
| In-System Programmability | Yes, via IEEE 1149.1 JTAG | — |
| ISP Standard Compliance | IEEE Std. 1532 | — |
| Boundary-Scan Test (BST) | Yes, IEEE 1149.1 compliant | — |
| パッケージ | 44-pin PLCC (J-Lead, surface mount) | — |
| 実装タイプ | Surface Mount | Surface Mount |
| 動作温度 | [DATA_NEEDED: industrial/commercial range] | -40C to +85C (industrial, 'I' grade) |
| RoHS ステータス | [DATA_NEEDED: compliant or non-compliant] | RoHS Non-Compliant (contains lead) |
| Logic Capacity | — | 600 usable gates |
| Number of Macrocells | — | 32 |
| Number of User I/Os | — | 34 |
| パッケージ / ケース | — | TQFP-44 (10x10 mm, 0.8 mm pitch) |
| MultiVolt I/O Interface | — | 5.0 V, 3.3 V, 2.5 V compatible |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Counter Frequency (fCNT) | — | 103.1 MHz |
| Setup Time (tSU) | — | [DATA_NEEDED: setup time] |
| Programmability | — | In-System Programmable (ISP) via IEEE Std. 1149.1 JTAG |
| ISP Standard | — | IEEE Std. 1532 compliant |
| Configuration Memory | — | Non-volatile EEPROM |
| Hot-Socketing Support | — | Yes |
| Lead-Free Status | — | Contains lead |