EPM3064ALC44-10 vs EPM3032ALC44-7 比較
詳細な並列比較: EPM3064ALC44-10 メーカー: Altera および EPM3032ALC44-7 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM3064ALC44-10 | EPM3032ALC44-7 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $4.12 | $0.95 |
| Family | MAX 3000A | MAX 3000A |
| Logic Elements / Macrocells | 64 macrocells | 32 macrocells |
| Number of Logic Array Blocks (LABs) | 4 | — |
| Usable Gates | 1,250 | — |
| Maximum User I/O Pins | 34 | — |
| Supply Voltage (VCCINT) | 3.3 V | — |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Maximum Counter Frequency (fCNT) | 192.3 MHz | — |
| Maximum Operating Frequency (fMAX) | [DATA_NEEDED: fMAX internal] | — |
| パッケージ | 44-PLCC (J-Lead) | 44-pin PLCC (J-Lead), 16.59 x 16.59 mm, 3.81 mm height |
| Process Technology | 0.30 µm CMOS EEPROM | — |
| Programmability | In-system programmable (JTAG IEEE 1149.1) | — |
| MultiVolt I/O | 2.5V / 3.3V / 5.0V interface compatible | — |
| 動作温度 | 0°C to +70°C (commercial) | 0 °C to +70 °C (Commercial) |
| RoHS ステータス | Compliant (lead-free L suffix indicates Pb-free package) | Not Compliant (per Arrow listing) |
| 実装タイプ | Surface Mount (PLCC socket compatible) | Surface Mount |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Array Blocks (LABs) | — | 2 |
| System Gates | — | 600 |
| Number of User I/O Pins | — | 34 |
| Global Clocks | — | 2 |
| Propagation Delay (tPD1, max) | — | 7.5 ns |
| Maximum Internal Frequency (fMAX) | — | 138.9 MHz |
| Supply Voltage (VCCINT / VCCIO) | — | 3.3 V |
| I/O Tolerant Voltage | — | 2.5 V / 3.3 V / 5.0 V (MultiVolt) |
| Program Memory Type | — | EEPROM |
| In-System Programming (ISP) | — | Yes - IEEE 1149.1 JTAG |
| Part Status | — | Obsolete |
| ECCN | — | EAR99 |