EPM3064ATC100-7N vs EPM3064ATC100-4 比較
詳細な並列比較: EPM3064ATC100-7N メーカー: Altera および EPM3064ATC100-4 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM3064ATC100-7N | EPM3064ATC100-4 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | NRND |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $6.10 | $5.20 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD - Complex Programmable Logic Device | CPLD (EEPROM-based) |
| Macrocells | 64 | — |
| Logic Array Blocks (LABs) | 2 | 2 |
| User I/O Pins | 66 | — |
| Usable Gates | up to 1,250 | 1,250 (range 600 to 10,000 across family) |
| Propagation Delay (tPD) | 7.5 ns (pin-to-pin, -7 speed grade) | — |
| Maximum Internal Frequency | 166.7 MHz (-7 speed grade) | — |
| Core Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Supply Voltage (VCCIO) | 3.3 V or 2.5 V | — |
| Program Memory Technology | EEPROM (non-volatile) | — |
| In-System Programming | IEEE Std. 1149.1 (JTAG), IEEE Std. 1532 | Yes (IEEE 1149.1 JTAG) |
| パッケージ | TQFP-100 | 100-pin TQFP |
| 実装タイプ | Surface Mount | Surface Mount |
| 動作温度 | 0 °C to +70 °C (commercial) | 0C to +70C (commercial) [DATA_NEEDED: industrial temp grade option] |
| RoHS ステータス | [DATA_NEEDED: confirmed RoHS status from manufacturer page] | unknown |
| Macro Cells | — | 64 |
| Maximum User I/O Pins | — | 34 |
| Pin-to-Pin Delay (tPD) | — | 4.5 ns |
| Counter Frequency (fCNT) | — | 227.3 MHz |
| Internal Performance | — | 222.2 MHz |
| Supply Voltage VCCINT | — | 3.3 V |
| I/O Voltage (MultiVolt) | — | 2.5 V / 3.3 V / 5.0 V |
| Process Technology | — | CMOS EEPROM |
| Architecture | — | 5-level Altera MAX |