EPM3064ATI44-7 vs EPM3064ATI44-4N 比較
詳細な並列比較: EPM3064ATI44-7 メーカー: Altera および EPM3064ATI44-4N メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM3064ATI44-7 | EPM3064ATI44-4N |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | NRND |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $4.40 | $4.25 |
| Family | MAX 3000A | MAX 3000A |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 64 | — |
| Usable Gates | 1,250 | 1,250 gates |
| User I/O | 34 | — |
| Logic Array Blocks (LABs) | 4 (16 macrocells each) | — |
| Propagation Delay (tPD) | 7.5 ns | — |
| Maximum Internal Frequency (fMAX) | 135.1 MHz | — |
| Supply Voltage (VCCINT) | 3.0 V to 3.6 V | — |
| Supply Voltage (VCCIO) | 3.0 V to 3.6 V | — |
| Process Technology | 0.30 µm CMOS EEPROM | — |
| 動作温度 | -40 °C to +85 °C (Industrial, 'I' suffix) | -40C to +85C (industrial) |
| パッケージ | 44-pin TQFP (TI44) | 44-pin TQFP |
| 実装タイプ | Surface Mount | Surface Mount |
| In-System Programmability | Yes, IEEE Std. 1532 compliant | — |
| JTAG Support | Yes (IEEE 1149.1) | — |
| PCI Compliance | Yes, speed grades -4/-5/-6/-7/-10 meet PCI SIG Rev. 2.2 | — |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: rohs status] |
| MSLレベル | [DATA_NEEDED: MSL level] | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Elements / Macrocells | — | 64 macrocells |
| Number of Logic Array Blocks (LABs) | — | 4 LABs (16 macrocells each) |
| Maximum Operating Frequency | — | 222.2 MHz |
| Pin-to-Pin Propagation Delay (tPD) | — | 4.5 ns (-4 speed grade) |
| Supply Voltage - Core (VCCINT) | — | 3.3 V |
| Supply Voltage - I/O (VCCIO) | — | 3.3 V or 2.5 V |
| User I/O Pins | — | 34 I/O |
| Programming Interface | — | IEEE Std. 1149.1 JTAG, IEEE Std. 1532 ISP |
| Configuration Memory | — | EEPROM (non-volatile) |