EPM3128ATC100-5 vs EPM3128ATC100-10 比較
詳細な並列比較: EPM3128ATC100-5 メーカー: Intel および EPM3128ATC100-10 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Altera
EPM3128ATC100-10 - MAX 3000A 128-Macrocell CPLD, 10ns TQFP-100 | Intel / Altera
EPM3128ATC100-10 Nrnd仕様比較
| パラメータ | EPM3128ATC100-5 | EPM3128ATC100-10 |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | NRND |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $15.43 | $8.10 |
| Series | MAX 3000A | — |
| Family | CPLD - MAX 3000A | — |
| Macrocells | 128 | 128 |
| Usable Gates | 2,500 | 2500 |
| User I/Os | 80 | 80 |
| Dedicated Inputs | 4 | — |
| Pin-to-Pin Delay (tpd) | 5 ns (commercial); 7.5 ns | — |
| Maximum Frequency (fCNT) | 192.3 MHz | — |
| Supply Voltage (VCCINT/VCCIO) | 3.3 V | — |
| Output Drive Voltage | 2.5 V or 3.3 V (programmable) | — |
| Input Tolerance | 2.5 V, 3.3 V, 5.0 V tolerant | — |
| Program Memory Type | EEPROM | — |
| In-System Programmability | Yes, IEEE Std. 1532 compliant | — |
| JTAG Boundary Scan | Yes, IEEE Std. 1149.1 | — |
| 動作温度 | 0 °C to 70 °C (Commercial) | 0 C to 70 C (commercial) |
| パッケージ | 100-pin TQFP (Fine Line) | 100-pin TQFP |
| 実装タイプ | Surface Mount | Surface Mount |
| Logic Family | CMOS | CMOS |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Process Technology | CMOS EEPROM | — |
| Device Family | — | MAX 3000A |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Propagation Delay (tPD) | — | 10 ns |
| Counter Frequency | — | 227.3 MHz |
| Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Voltage Tolerance | — | 5.0 V / 3.3 V / 2.5 V (MultiVolt) |
| Configuration Memory | — | EEPROM (non-volatile) |
| In-System Programming | — | IEEE Std. 1532 compliant (JTAG) |
| PCI Compliance | — | PCI Local Bus Specification Rev 2.2 (selected speed grades) |