EPM3128ATI100-10 vs EPM3128ATC100-7 比較
詳細な並列比較: EPM3128ATI100-10 メーカー: Altera および EPM3128ATC100-7 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM3128ATI100-10 | EPM3128ATC100-7 |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | 有効 | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $8.40 | $9.20 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macro Cells | 128 | 128 |
| Usable Gates | 2,500 | — |
| User I/Os | 80 | 80 |
| Logic Elements / LABs | [DATA_NEEDED: LAB count] | 4 Logic Array Blocks (LABs) |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Counter Frequency (fCNT) | up to 227.3 MHz | 129.9 MHz |
| Supply Voltage (VCCINT) | 3.3 V | 3.3 V |
| MultiVolt I/O Levels | 5.0 V / 3.3 V / 2.5 V compatible | — |
| Programmability | EEPROM, 3.3 V in-system (JTAG) | — |
| パッケージ | TQFP-100 (1.0 mm pitch, 14x14 mm) | 100-pin TQFP, 14x14 mm, 0.5 mm pitch |
| 動作温度 | -40 °C to +85 °C (industrial) | 0C to +70C (Commercial) |
| Process Technology | CMOS EEPROM | CMOS EEPROM |
| Open-Drain Output Option | Yes (per I/O pin) | — |
| Boundary-Scan (JTAG) | IEEE 1149.1 compliant | — |
| RoHS ステータス | [DATA_NEEDED: RoHS status -10 suffix historically Pb-free; -10N suffix is lead-free] | [DATA_NEEDED: RoHS status] |
| 実装タイプ | Surface Mount | — |
| Typical Gates | — | 2500 |
| Propagation Delay (tPD) | — | 7.5 ns |
| I/O Voltage Tolerance | — | 5.0 V tolerant inputs |
| Programming Technology | — | EEPROM (non-volatile, in-system programmable) |
| ISP Standard | — | IEEE Std. 1532 (JTAG) |
| Speed Grade | — | -7 (fastest grade in family) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |