EPM3256AQC208-10N vs EPM3256AQI208-10N 比較
詳細な並列比較: EPM3256AQC208-10N メーカー: Altera および EPM3256AQI208-10N メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM3256AQC208-10N | EPM3256AQI208-10N |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $4.62 | $9.75 |
| Series | MAX 3000A | — |
| Programmable Type | In-System Programmable (EEPROM) | — |
| Number of Macrocells | 256 | — |
| Number of Logic Elements/Blocks | 16 LABs | — |
| Usable Gates | 10,000 | 5,000 |
| Number of I/O Pins | 161 (158 user I/O per Arrow listing) | — |
| Propagation Delay (tpd) | 10 ns (max) | — |
| Maximum Counter Frequency | 227.3 MHz | — |
| Supply Voltage - Internal | 3.0 V to 3.6 V (3.3 V typical) | — |
| 動作温度 | 0C to +70C (Commercial) | -40 C to +85 C (industrial) |
| パッケージ / ケース | 208-BFQFP / 208-PQFP (28x28 mm) | — |
| 実装タイプ | Surface Mount | Surface Mount |
| ISP Compliance | IEEE Std. 1532 | — |
| Boundary Scan | IEEE Std. 1149.1 (JTAG) | — |
| I/O Tolerance | 5 V tolerant, MultiVolt interface | — |
| RoHS ステータス | [DATA_NEEDED: lead-free status - non-RoHS suffix 'N' typically indicates lead-free finish, but datasheet not present in data] | Non-compliant (Pb-bearing PQFP package) |
| Family | — | MAX 3000A |
| Macrocells | — | 256 |
| User I/Os | — | 161 |
| Logic Elements / LABs | — | 16 Logic Array Blocks (LABs) |
| Propagation Delay (tPD) | — | 10 ns |
| Counter Frequency | — | 118.7 MHz (max, -10 speed grade) |
| Speed Grade | — | -10 |
| Supply Voltage - Core | — | 3.3 V |
| I/O Logic Level Compatibility | — | 5.0 V, 3.3 V, 2.5 V (MultiVolt I/O) |
| パッケージ | — | 208-pin PQFP (Plastic Quad Flat Pack) |
| Programming Interface | — | JTAG (IEEE 1149.1) ISP |
| Process Technology | — | CMOS EEPROM |
| Hot-Socketing Support | — | Yes |