EPM3512ATI256-10N vs EPM3512ATC256-10N 比較
詳細な並列比較: EPM3512ATI256-10N メーカー: Intel および EPM3512ATC256-10N メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM3512ATI256-10N | EPM3512ATC256-10N |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $19.85 | $20.10 |
| Manufacturer | Intel (formerly Altera Corporation) | — |
| Family | MAX 3000A | MAX 3000A |
| Device | EPM3512A | — |
| Macrocells | 512 | 512 |
| Usable Gates | 10,000 | — |
| Logic Array Blocks (LABs) | 16 | 16 |
| Maximum User I/O | 212 | — |
| Speed Grade | -10 (10 ns pin-to-pin delay) | — |
| パッケージ | 256-pin BGA (TI256) | FBGA-256 (FineLine BGA, 17x17 mm, 1.0 mm pitch) |
| 動作温度 | -40C to +85C (Industrial) | 0 C to +70 C (commercial, "C" suffix) |
| Core Voltage | 3.3 V | — |
| I/O Voltage Support | 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt) | — |
| Programming Technology | EEPROM (non-volatile, in-system programmable) | — |
| JTAG Support | IEEE Std 1149.1 boundary-scan, 4-pin JTAG | — |
| Programmable Security Bit | Yes (design protection) | — |
| 実装タイプ | Surface Mount | Surface Mount |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | unknown |
| ライフサイクル状態 | Obsolete / Last Time Buy (per Altera product discontinuation notices) | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Maximum User I/O Pins | — | 208 |
| Propagation Delay (tPD1) | — | 10 ns |
| Core Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Supply Voltage (VCCIO) | — | 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt) |
| Programming Interface | — | JTAG (IEEE Std. 1149.1) - in-system programmable |
| Process Technology | — | 0.30 um CMOS EEPROM |
| Lead-Free | — | unknown |