EPM5016DC-15 vs EPM5032DC-20 比較
詳細な並列比較: EPM5016DC-15 メーカー: Altera および EPM5032DC-20 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM5016DC-15 | EPM5032DC-20 |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $10.75 | $5.05 |
| Device Family | MAX 5000 | — |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Macrocells | 16 | 32 |
| Logic Array Blocks (LABs) | 2 | — |
| Dedicated Inputs | 4 | — |
| User I/O Pins | 12 | — |
| Pin-to-Pin Delay (tpd) | 15 ns | — |
| Maximum Frequency (fmax) | 71 MHz | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | 5 V |
| Programming Voltage (VPP) | 12.75 V | — |
| 動作温度 | 0 °C to 70 °C (commercial) | [DATA_NEEDED: commercial/industrial/military grade] |
| パッケージ | Ceramic DIP-24 (windowed) | 20-pin DIP (Windowed Ceramic, 0.3" wide) |
| 実装タイプ | Through-Hole | Through-Hole |
| Process Technology | CMOS EPROM | — |
| Configuration Memory | Non-volatile UV-erasable EPROM | — |
| RoHS ステータス | [DATA_NEEDED: RoHS status - pre-RoHS era part, likely non-compliant] | Compliant (per IC-Components listing) |
| Lead Finish | [DATA_NEEDED: lead-free status] | — |
| Product Family | — | MAX 5000 |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Programmable Technology | — | UV-Erasable / OTP EPROM |
| Usable Gates | — | 600 |
| Maximum Frequency (fCNT) | — | 71.4 MHz |
| Pin-to-Pin Delay (tPD) | — | 20 ns |
| Speed Grade | — | -20 |
| Logic Blocks | — | 4 Logic Array Blocks (LABs) |
| I/O Pins | — | [DATA_NEEDED: I/O pin count for DIP-20 variant] |
| Lead Free | — | [DATA_NEEDED: confirmed lead-free] |
| Manufacturer | — | Altera (now Intel Programmable Solutions Group) |
| Programming Method | — | Altera MAX+PLUS II / Quartus (legacy support) |