EPM5016DC-17 vs EPM5016PC-1 比較
詳細な並列比較: EPM5016DC-17 メーカー: Altera および EPM5016PC-1 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM5016DC-17 | EPM5016PC-1 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $16.20 | $9.95 |
| Family | MAX 5000 | MAX 5000 EPLD |
| Macrocells | 16 | 16 |
| Logic Elements | [DATA_NEEDED: LE count for MAX 5000 family] | — |
| User I/O Pins (max) | 24 | — |
| Propagation Delay (tPD) | 17 ns | 35 ns |
| Counter Frequency (fCNT) | 67 MHz | — |
| Supply Voltage (VCC) | 5 V | 4.75 V to 5.25 V |
| I/O Standard | TTL-compatible | — |
| Process Technology | 0.75 micron CMOS EEPROM | — |
| パッケージ | Ceramic DIP-24 (DC suffix) | PDIP-20 (plastic DIP, through-hole) |
| ピン数 | 24 | 20 |
| 実装タイプ | Through-hole | — |
| 動作温度 | 0C to +70C (commercial) | 0 C to +70 C (commercial) |
| In-System Programmability | Yes (ByteBlaster / BitBlaster) | — |
| Configuration Memory | On-chip EEPROM (non-volatile) | CMOS EEPROM (UV-erasable) |
| RoHS ステータス | [DATA_NEEDED: confirmed compliance status from manufacturer] | Non-compliant (PDIP with SnPb leads, pre-RoHS era) |
| Usable Gates | — | 200 |
| Logic Array Blocks (LABs) | — | 1 |
| Maximum Frequency (fMAX) | — | 62 MHz |
| Setup Time (tSU) | — | [DATA_NEEDED: setup time ns] |
| Supply Current (ICC) | — | 50 mA typical |
| Programming Interface | — | Altera 4-pin JTAG-style (MasterBlaster / ByteBlaster) |