EPM5016LC-17 vs EPM5016DC-15 比較
詳細な並列比較: EPM5016LC-17 メーカー: Altera および EPM5016DC-15 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM5016LC-17 | EPM5016DC-15 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $10.95 | $10.75 |
| Family | MAX 5000 EPLD | — |
| Technology | CMOS, UV-erasable | — |
| Macrocells | 16 | 16 |
| Product Terms | 160 | — |
| Dedicated Inputs | 7 | 4 |
| I/O Pins | 8 | — |
| Total Input Pins | 16 | — |
| Outputs | 8 | — |
| External Clock Inputs | 1 | — |
| Propagation Delay (tPD) | 17 ns | — |
| Architecture | PAL-type with Programmable Interconnect Array (PIA) | — |
| パッケージ | Windowed Ceramic DIP (LC) | Ceramic DIP-24 (windowed) |
| 電源電圧 | [DATA_NEEDED: VCC range] | — |
| 動作温度 | [DATA_NEEDED: temperature grade] | 0 °C to 70 °C (commercial) |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status - pre-RoHS era part, likely non-compliant] |
| Logic Compatibility | TTL/CMOS | — |
| Device Family | — | MAX 5000 |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Logic Array Blocks (LABs) | — | 2 |
| User I/O Pins | — | 12 |
| Pin-to-Pin Delay (tpd) | — | 15 ns |
| Maximum Frequency (fmax) | — | 71 MHz |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V |
| Programming Voltage (VPP) | — | 12.75 V |
| 実装タイプ | — | Through-Hole |
| Process Technology | — | CMOS EPROM |
| Configuration Memory | — | Non-volatile UV-erasable EPROM |
| Lead Finish | — | [DATA_NEEDED: lead-free status] |