EPM5016PC-1 vs EPM5016DC-17 比較
詳細な並列比較: EPM5016PC-1 メーカー: Altera および EPM5016DC-17 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM5016PC-1 | EPM5016DC-17 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $9.95 | $16.20 |
| Family | MAX 5000 EPLD | MAX 5000 |
| Macrocells | 16 | 16 |
| Usable Gates | 200 | — |
| Logic Array Blocks (LABs) | 1 | — |
| Propagation Delay (tPD) | 35 ns | 17 ns |
| Maximum Frequency (fMAX) | 62 MHz | — |
| Setup Time (tSU) | [DATA_NEEDED: setup time ns] | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | 5 V |
| Supply Current (ICC) | 50 mA typical | — |
| 動作温度 | 0 C to +70 C (commercial) | 0C to +70C (commercial) |
| パッケージ | PDIP-20 (plastic DIP, through-hole) | Ceramic DIP-24 (DC suffix) |
| ピン数 | 20 | 24 |
| Configuration Memory | CMOS EEPROM (UV-erasable) | On-chip EEPROM (non-volatile) |
| Programming Interface | Altera 4-pin JTAG-style (MasterBlaster / ByteBlaster) | — |
| RoHS ステータス | Non-compliant (PDIP with SnPb leads, pre-RoHS era) | [DATA_NEEDED: confirmed compliance status from manufacturer] |
| Logic Elements | — | [DATA_NEEDED: LE count for MAX 5000 family] |
| User I/O Pins (max) | — | 24 |
| Counter Frequency (fCNT) | — | 67 MHz |
| I/O Standard | — | TTL-compatible |
| Process Technology | — | 0.75 micron CMOS EEPROM |
| 実装タイプ | — | Through-hole |
| In-System Programmability | — | Yes (ByteBlaster / BitBlaster) |