EPM5032DC-20 vs EPM5016DC-20 比較
詳細な並列比較: EPM5032DC-20 メーカー: Intel および EPM5016DC-20 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM5032DC-20 | EPM5016DC-20 |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $5.05 | $16.50 |
| Product Family | MAX 5000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | EPLD (UV-Erasable Programmable Logic Device) |
| Programmable Technology | UV-Erasable / OTP EPROM | — |
| Usable Gates | 600 | — |
| Macrocells | 32 | 16 |
| Maximum Frequency (fCNT) | 71.4 MHz | — |
| Pin-to-Pin Delay (tPD) | 20 ns | — |
| Speed Grade | -20 | -20 = 20 ns tPD |
| Supply Voltage (VCC) | 5 V | — |
| パッケージ | 20-pin DIP (Windowed Ceramic, 0.3" wide) | — |
| 実装タイプ | Through-Hole | — |
| Logic Blocks | 4 Logic Array Blocks (LABs) | — |
| I/O Pins | [DATA_NEEDED: I/O pin count for DIP-20 variant] | 8 |
| 動作温度 | [DATA_NEEDED: commercial/industrial/military grade] | [DATA_NEEDED: operating temperature range] |
| RoHS ステータス | Compliant (per IC-Components listing) | [DATA_NEEDED: RoHS compliance] |
| Lead Free | [DATA_NEEDED: confirmed lead-free] | — |
| Manufacturer | Altera (now Intel Programmable Solutions Group) | — |
| Programming Method | Altera MAX+PLUS II / Quartus (legacy support) | UV erase + EPROM-style programming via Altera programming hardware |
| Family | — | MAX 5000 |
| Product Terms | — | 160 |
| Dedicated Inputs | — | 7 |
| Propagation Delay (tPD) | — | 20 ns |
| 最大クロック周波数 | — | 62.5 MHz |
| Maximum Supply Voltage | — | 5.25 V |
| Nominal Supply Voltage | — | 5.0 V |
| Process Technology | — | CMOS, UV-erasable |
| Architecture | — | PAL-type macrocell with Programmable Interconnect Array (PIA) |
| Package Type | — | 20-pin Ceramic DIP (Cerdip) with UV window |
| Package Suffix Code | — | DC = Ceramic DIP, Commercial |