EPM5064JI-1 vs EPM5064JC1 比較
詳細な並列比較: EPM5064JI-1 メーカー: Intel および EPM5064JC1 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM5064JI-1 | EPM5064JC1 |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $3.40 | $1.05 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | EPLD (Erasable Programmable Logic Device) | CPLD / EPLD (Erasable PLD) |
| Macrocells | 64 | 64 |
| User I/O Pins | [DATA_NEEDED: user I/O count from datasheet] | — |
| パッケージ | 68-pin PLCC (windowed ceramic) | 44-pin PLCC (J-Lead) |
| Logic Elements | [DATA_NEEDED: total logic elements] | — |
| Propagation Delay (tPD) | [DATA_NEEDED: combinational tPD from datasheet] | — |
| 電源電圧 | 5 V | — |
| 動作温度 | [DATA_NEEDED: commercial vs industrial grade temp range] | — |
| Process Technology | CMOS, UV-erasable | CMOS |
| Speed Grade | JI-1 (commercial, -10/-12/-15 family) | — |
| Programmability | UV-erasable (windowed package) | — |
| Data Retention | 25 years (per MAX 5000 datasheet) | — |
| 実装タイプ | Surface Mount | — |
| RoHS ステータス | [DATA_NEEDED: not stated in provided data] | unknown |
| Logic Array Blocks (LABs) | — | 4 |
| Usable Gates | — | 1.25K |
| Maximum Operating Frequency (fCNT) | — | 62.5 MHz |
| External Clock Input (max) | — | 50 MHz |
| I/O Pins | — | 28 |
| Dedicated Inputs | — | 7 |
| Total Inputs | — | 36 (28 I/O + 7 dedicated + 1 clock) |
| Operating Voltage (VCC) | — | 5 V |
| Program Type | — | EPROM (one-time programmable, UV-erasable) |
| Operating Temperature (JC suffix) | — | 0°C to +70°C (commercial) |
| Supply Current (ICC) | — | [DATA_NEEDED: ICC maximum] |
| Lead-Free Status | — | unknown |