EPM5064LI vs EPM5064LC-1 比較
詳細な並列比較: EPM5064LI メーカー: Altera および EPM5064LC-1 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM5064LI | EPM5064LC-1 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $9.95 | $9.95 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 64 | 64 |
| Logic Array Blocks (LABs) | 4 | 4 |
| Number of Terminals | 44 | — |
| Package Code | QCCJ (PLCC-44, J-bend) | — |
| Package Shape | Square | — |
| Configuration Memory | UV-Erasable / OTP (EPROM-based) | — |
| Supply Voltage (VCC) | 4.5 V to 5.5 V | 4.75 V to 5.25 V |
| Operating Temperature Grade | Industrial | — |
| 最大クロック周波数 | 33.3 MHz | — |
| Propagation Delay (tPD) | 55 ns (typical) | 40 ns |
| I/O Pins | 28 bidirectional | — |
| Dedicated Inputs | 7 | 7 |
| Total User Inputs | 36 | — |
| Process Technology | 1-micron EPIC CMOS | CMOS |
| Latch-up Immunity | 500 mA typical at 125 C | — |
| 実装タイプ | Surface Mount | — |
| RoHS ステータス | [DATA_NEEDED: confirm RoHS status - legacy Altera part] | [DATA_NEEDED: RoHS compliance] |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Usable Gates | — | 1.25K (approx.) |
| Internal Operating Frequency | — | 62.5 MHz |
| Input Lines | — | 36 |
| Output Lines | — | 28 |
| Programming Technology | — | OTP / UV-Erasable EPROM |
| パッケージ | — | 44-pin PLCC (Plastic Leaded Chip Carrier) |
| 動作温度 | — | [DATA_NEEDED: operating temperature range] |
| Programming Interface | — | JTAG (ByteBlaster-compatible) |