EPM5128GC-1 vs EPM5064LC 比較
詳細な並列比較: EPM5128GC-1 メーカー: Altera および EPM5064LC メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM5128GC-1 | EPM5064LC |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $18.95 | $7.10 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | UV-erasable CMOS CPLD | CPLD (Complex Programmable Logic Device) |
| Macrocells | 128 | — |
| Usable Gates | 2,500 | 1.25K |
| Dedicated Inputs | 7 | — |
| Maximum User I/O Pins | 52 | — |
| Nominal Supply Voltage | 5 V | — |
| Supply Voltage Range | 4.75 V to 5.25 V | — |
| Maximum Operating Frequency | 62.5 MHz | — |
| Propagation Delay (tPD) | 16 ns (typical, -1 speed grade) | 55 ns |
| パッケージ | PGA-96+ (Pin Grid Array, ceramic windowed) | PLCC-44 (LCC-44, J-lead) |
| Technology | CMOS, UV-erasable EPROM | — |
| 動作温度 | -40C to +85C (industrial) | 0C to +70C (Commercial) |
| IOL / IOH | 100 mA / 25 mA per pin (legacy figure, [DATA_NEEDED: verify exact drive spec]) | — |
| Security Bit | Programmable, prevents readback | — |
| Programming Method | UV erase + EPROM program (or device programmer) | — |
| MSLレベル | [DATA_NEEDED: MSL level] | — |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance - ceramic PGA part is legacy] | [DATA_NEEDED: RoHS status - pre-RoHS legacy part, likely non_compliant] |
| Programming Type | — | OTP (One-Time-Programmable, UV-erasable EPROM) |
| Macro Cells | — | 64 |
| Logic Array Blocks (LABs) | — | 4 |
| Total Inputs | — | 36 (7 dedicated + 29 I/O) |
| I/O Pins | — | 28 bidirectional + 4 dedicated input |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V |
| Process Technology | — | CMOS EPROM |
| 実装タイプ | — | Surface Mount |
| Lead Free | — | [DATA_NEEDED: lead-free status] |