EPM5128GC vs EPM5128GC-1 比較

詳細な並列比較: EPM5128GC メーカー: Altera および EPM5128GC-1 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。

仕様比較

パラメータ EPM5128GC EPM5128GC-1
ブランド Altera Altera
カテゴリ FPGA & CPLD FPGA & CPLD
ライフサイクル状態 Obsolete Obsolete
在庫状況 In Stock In Stock
単価(USD) $19.20 $18.95
Family MAX 5000 MAX 5000
Macrocells 128 128
Usable Gates 2,500 2,500
Logic Elements / LABs [DATA_NEEDED: LAB count] —
User I/Os 68 —
Package Type WPGA (Windowed Ceramic Pin Grid Array) —
Package Code WPGA —
Number of Terminals 68 —
Terminal Form PIN/PEG (through-hole PGA with alignment pegs) —
Package Shape Square —
Temperature Grade Commercial —
Supply Voltage (Vcc) 5 V —
Process Technology CMOS, UV-erasable —
Architecture EPLD, programmable AND/OR array with fixed OR plane —
Propagation Delay (tpd) [DATA_NEEDED: tpd in ns] —
Maximum Frequency (fmax) [DATA_NEEDED: fmax in MHz] —
Programmable Security Bit Yes —
Configuration Memory Non-volatile UV-EPROM (windowed ceramic) —
実装タイプ Through-Hole (PGA socket required) —
RoHS ステータス [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: RoHS compliance - ceramic PGA part is legacy]
Device Type — UV-erasable CMOS CPLD
Dedicated Inputs — 7
Maximum User I/O Pins — 52
Nominal Supply Voltage — 5 V
Supply Voltage Range — 4.75 V to 5.25 V
Maximum Operating Frequency — 62.5 MHz
Propagation Delay (tPD) — 16 ns (typical, -1 speed grade)
パッケージ — PGA-96+ (Pin Grid Array, ceramic windowed)
Technology — CMOS, UV-erasable EPROM
動作温度 — -40C to +85C (industrial)
IOL / IOH — 100 mA / 25 mA per pin (legacy figure, [DATA_NEEDED: verify exact drive spec])
Security Bit — Programmable, prevents readback
Programming Method — UV erase + EPROM program (or device programmer)
MSLレベル — [DATA_NEEDED: MSL level]

データシート&リソース

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