EPM5128JC vs EPM5128GI 比較
詳細な並列比較: EPM5128JC メーカー: Altera および EPM5128GI メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM5128JC | EPM5128GI |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $9.75 | $19.85 |
| Product Family | MAX 5000 | — |
| Device Type | EPLD / CPLD | — |
| Macrocell Count | 128 | — |
| Propagation Delay (tPD) | 35 ns | 55 ns |
| Logic Elements | Programmable AND/OR/XOR array | — |
| Supply Voltage (VCC) | 5 V (typical) | — |
| ピン数 | 68 | — |
| Package Type | PLCC-68 (JLCC) ceramic, J-leaded | — |
| Dedicated Inputs | 8 | — |
| User I/O Pins | [DATA_NEEDED: user I/O pin count] | — |
| Configuration Memory | UV-erasable EPROM (windowed package) | Non-volatile EPROM (no external boot device) |
| Programming Interface | Altera MAX+PLUS II / A+PLUS / legacy programmer | — |
| 動作温度 | Commercial 0C to +70C | — |
| 実装タイプ | Surface Mount (PLCC socket or solder) | Through-hole (socketed PGA) |
| Boundary Scan | JTAG IEEE 1149.1 (family feature) | — |
| Process Technology | CMOS EPROM | — |
| RoHS ステータス | [DATA_NEEDED: RoHS status - legacy part] | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Family | — | MAX 5000 |
| Logic Cells / Macrocells | — | 128 |
| 電源電圧 | — | 5 V |
| Technology | — | CMOS, UV-erasable EPROM |
| パッケージ | — | CPGA-68 (Ceramic Pin Grid Array, windowed) |
| ピン数 | — | 68 |
| Operating Temperature Grade | — | Industrial |
| Programmability | — | UV-erasable (windowed), field-programmable |
| Manufacturer | — | Altera Corporation (now Intel PSG) |
| ライフサイクル状態 | — | Obsolete (last produced by Altera, legacy stock via distributors) |