EPM5130GM883B vs EPM5130GI 比較
詳細な並列比較: EPM5130GM883B メーカー: Altera および EPM5130GI メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM5130GM883B | EPM5130GI |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | ラストバイ | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $108.00 | $16.20 |
| Manufacturer | Altera (now Intel Programmable Solutions Group) | — |
| Series | MAX 5000 | — |
| Device Type | CPLD - Complex Programmable Logic Device | — |
| Usable Gates | 5,000 | — |
| Macrocells | 128 | 128 |
| User I/O Pins | [DATA_NEEDED: maximum user I/O count] | — |
| パッケージ | 100-pin CPGA (S-CPGA-P100) | Ceramic Pin Grid Array (PGA), windowed |
| ピン数 | 100 | — |
| 実装タイプ | Through-Hole (Pin Grid Array) | — |
| 動作温度 | -55C to +125C (MIL-STD-883B screening) | -40C to +85C (industrial) |
| 電源電圧 | 5 V | 5 V |
| Logic Family | CMOS, TTL-compatible | — |
| Configuration Memory | Non-volatile EEPROM | — |
| Propagation Delay | [DATA_NEEDED: tpd in ns] | — |
| Screening Level | MIL-STD-883B Class B | — |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Lead Free Status | Lead free / RoHS Compliant (per ICComponents listing) | — |
| Programmable Security | Yes (security bit) | — |
| Device Family | — | MAX 5000 |
| Architecture | — | EPLD (Erasable Programmable Logic Device), UV-erasable |
| Logic Array Blocks (LABs) | — | 8 |
| Interconnect | — | Programmable Interconnect Array (PIA) |
| Dedicated Inputs | — | 19 |
| Total Inputs | — | 68 |
| I/O Pins | — | 48 |
| Propagation Delay (tPD) | — | 55 ns |
| Maximum Clock Frequency (fMAX) | — | 33.3 MHz |
| External Clock Pins | — | 1 |
| Process Technology | — | CMOS |
| Programming Method | — | UV erasure + EPROM programming |