EPM5130GM883B vs EPM5130LC 比較
詳細な並列比較: EPM5130GM883B メーカー: Altera および EPM5130LC メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM5130GM883B | EPM5130LC |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | ラストバイ | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $108.00 | $15.60 |
| Manufacturer | Altera (now Intel Programmable Solutions Group) | — |
| Series | MAX 5000 | MAX 5000 |
| Device Type | CPLD - Complex Programmable Logic Device | — |
| Usable Gates | 5,000 | — |
| Macrocells | 128 | 128 |
| User I/O Pins | [DATA_NEEDED: maximum user I/O count] | 48 |
| パッケージ | 100-pin CPGA (S-CPGA-P100) | JLCC-68 (J-Lead Ceramic Chip Carrier) |
| ピン数 | 100 | — |
| 実装タイプ | Through-Hole (Pin Grid Array) | Surface Mount |
| 動作温度 | -55C to +125C (MIL-STD-883B screening) | [DATA_NEEDED: commercial/industrial/military grade] |
| 電源電圧 | 5 V | — |
| Logic Family | CMOS, TTL-compatible | — |
| Configuration Memory | Non-volatile EEPROM | — |
| Propagation Delay | [DATA_NEEDED: tpd in ns] | — |
| Screening Level | MIL-STD-883B Class B | — |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance status] | Non-compliant (ceramic JLCC, contains lead) |
| Lead Free Status | Lead free / RoHS Compliant (per ICComponents listing) | — |
| Programmable Security | Yes (security bit) | — |
| Family | — | MAX 5000 (EPM51xx) |
| Logic Array Blocks (LABs) | — | 8 |
| Total Inputs (Dedicated + I/O) | — | 68 |
| Dedicated Inputs | — | 19 |
| Propagation Delay (tPD) | — | 55 ns |
| Maximum Internal Clock Frequency | — | 50 MHz |
| Global Clock Inputs | — | 1 |
| Configuration Technology | — | UV-Erasable / OTP EPROM |
| Process Technology | — | CMOS (0.7 um EPROM) |
| Supply Voltage (VCC) | — | 4.5 V to 5.5 V |
| I/O Standard | — | TTL-compatible |