EPM5130LC vs EPM5130GM883B 比較
詳細な並列比較: EPM5130LC メーカー: Altera および EPM5130GM883B メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM5130LC | EPM5130GM883B |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | ラストバイ |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $15.60 | $108.00 |
| Series | MAX 5000 | MAX 5000 |
| Family | MAX 5000 (EPM51xx) | — |
| Macrocells | 128 | 128 |
| Logic Array Blocks (LABs) | 8 | — |
| User I/O Pins | 48 | [DATA_NEEDED: maximum user I/O count] |
| Total Inputs (Dedicated + I/O) | 68 | — |
| Dedicated Inputs | 19 | — |
| Propagation Delay (tPD) | 55 ns | — |
| Maximum Internal Clock Frequency | 50 MHz | — |
| Global Clock Inputs | 1 | — |
| Configuration Technology | UV-Erasable / OTP EPROM | — |
| Process Technology | CMOS (0.7 um EPROM) | — |
| Supply Voltage (VCC) | 4.5 V to 5.5 V | — |
| I/O Standard | TTL-compatible | — |
| パッケージ | JLCC-68 (J-Lead Ceramic Chip Carrier) | 100-pin CPGA (S-CPGA-P100) |
| 動作温度 | [DATA_NEEDED: commercial/industrial/military grade] | -55C to +125C (MIL-STD-883B screening) |
| 実装タイプ | Surface Mount | Through-Hole (Pin Grid Array) |
| RoHS ステータス | Non-compliant (ceramic JLCC, contains lead) | [DATA_NEEDED: RoHS compliance status] |
| Manufacturer | — | Altera (now Intel Programmable Solutions Group) |
| Device Type | — | CPLD - Complex Programmable Logic Device |
| Usable Gates | — | 5,000 |
| ピン数 | — | 100 |
| 電源電圧 | — | 5 V |
| Logic Family | — | CMOS, TTL-compatible |
| Configuration Memory | — | Non-volatile EEPROM |
| Propagation Delay | — | [DATA_NEEDED: tpd in ns] |
| Screening Level | — | MIL-STD-883B Class B |
| Lead Free Status | — | Lead free / RoHS Compliant (per ICComponents listing) |
| Programmable Security | — | Yes (security bit) |