EPM5192AJI84-20 vs EPM5192AGC-20 比較
詳細な並列比較: EPM5192AJI84-20 メーカー: Altera および EPM5192AGC-20 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM5192AJI84-20 | EPM5192AGC-20 |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $10.95 | $9.95 |
| Device Family | MAX 5000 (EPM5192) | — |
| Logic Cells / Macrocells | 192 macrocells | — |
| Device Type | UV-Erasable / OTP Complex PLD | EPLD (EEPLD, UV-erasable) |
| Propagation Delay (tPD) | 33 ns | 20 ns |
| Maximum Frequency (fCNT) | 66.7 MHz | — |
| Supply Voltage (VCC) | 5 V nominal (4.5 V to 5.5 V) | 5 V (4.75 V to 5.25 V) |
| Process Technology | CMOS | — |
| Operating Temperature Grade | Industrial | — |
| Package Code | WQCCJ (JEDEC) | — |
| Package Type | 84-pin J-bend Ceramic Chip Carrier (PLCC-84, JI) | — |
| 実装タイプ | Surface Mount | Through-hole (PGA socket) |
| Terminal Form | J-Bend | — |
| Number of Terminals | 84 | — |
| Programmability | UV-erasable window + OTP | — |
| ピン数 | 84 | — |
| ライフサイクル状態 | Obsolete (legacy Altera MAX 5000) | — |
| RoHS ステータス | [DATA_NEEDED: RoHS status of EPM5192AJI84-20] | [DATA_NEEDED: RoHS status - ceramic PGA windowed parts are typically pre-RoHS] |
| Family | — | MAX 5000 |
| Macrocells | — | 192 |
| Usable Gates | — | 12,000 |
| Counter Frequency (fCNT) | — | 100 MHz (max) |
| Logic Array Blocks (LABs) | — | 8 |
| Dedicated I/O Pins | — | 96 |
| Programming Interface | — | IEEE 1149.1 JTAG |
| In-System Programmability | — | Yes (5 V ISP) |
| Security Bit | — | Yes (pattern read-back protected) |
| パッケージ | — | PGA-132 (ceramic windowed, 'GC') |
| 動作温度 | — | 0C to 70C (commercial) |