EPM5192GC-1 vs EPM5192GM-1 比較
詳細な並列比較: EPM5192GC-1 メーカー: Altera および EPM5192GM-1 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM5192GC-1 | EPM5192GM-1 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $17.85 | $27.80 |
| Family | MAX 5000 (Classic) | MAX 5000 |
| Logic Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 192 | — |
| Usable Gates | 3,750 | — |
| Logic Array Blocks (LABs) | 12 | — |
| Dedicated Inputs | 7 | — |
| User I/O Pins | 64 | [DATA_NEEDED: user I/O count] |
| Maximum Propagation Delay (tPD) | 40 ns | — |
| Maximum Frequency (fMAX) | 62.5 MHz | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | — |
| Process Technology | CMOS, UV-erasable / OTP | CMOS |
| パッケージ | 100-pin Ceramic PGA (GC) | CPGA-84 (Windowed Ceramic PGA) |
| 実装タイプ | Through-Hole (PGA) | Through-Hole (Pin Grid Array socket) |
| Configuration Method | UV-Erase / One-Time Programmable | — |
| Interconnect | Peripheral Interconnect Array (PIA) | — |
| 動作温度 | [DATA_NEEDED: operating temperature grade] | — |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | — |
| Logic Cells | — | 192 |
| Propagation Delay (tpd) | — | 55 ns |
| Programmable Element | — | UV-erasable EPROM |
| ピン数 | — | 84 |
| 電源電圧 | — | [DATA_NEEDED: VCC nominal] |
| 動作温度範囲 | — | [DATA_NEEDED: commercial/industrial/military grade] |
| Programmable Macrocells | — | 192 |
| RoHS Compliance | — | unknown (legacy ceramic PGA) |
| Lead-Free Status | — | unknown |
| Programming Interface | — | Altera ByteBlaster / JEDEC bitstream |
| Development Tool | — | Altera MAX+PLUS II (legacy) |