EPM5192GC1 vs EPM5192JC-1 比較
詳細な並列比較: EPM5192GC1 メーカー: Altera および EPM5192JC-1 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM5192GC1 | EPM5192JC-1 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $24.50 | $22.40 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD - Complex Programmable Logic Device |
| Macro Cells | 192 | — |
| Usable Gates | 3,750 | 3750 |
| Maximum Operating Frequency | 62.5 MHz | — |
| Supply Voltage (VCC) | 5 V | 4.75 V to 5.25 V |
| Programming Technology | UV-Erasable / OTP EPROM | — |
| Package Type | Ceramic PGA (Pin Grid Array) | 84-pin Ceramic Quad Flat Pack (CQFP), windowed |
| Logic Elements | 192 macrocells with AND/OR array | — |
| Process Technology | EPROM-based CMOS | — |
| 動作温度 | [DATA_NEEDED: operating temperature range] | 0 C to +70 C (commercial) |
| Propagation Delay | [DATA_NEEDED: tpd specification] | — |
| ピン数 | [DATA_NEEDED: pin count for GC1 PGA package] | — |
| 実装タイプ | Through-hole (PGA) | — |
| RoHS ステータス | unknown | — |
| Development Tool | Altera MAX+PLUS II | — |
| Technology | — | CMOS, UV-Erasable / OTP |
| Macrocells | — | 192 |
| Propagation Delay (tPD) | — | 40 ns (speed grade -1) |
| Maximum Internal Frequency (fMAX) | — | 62.5 MHz |
| User I/O Pins | — | 84 |
| JEDEC Package Code | — | S-CQCC-J84 |
| Configuration Memory | — | UV-EPROM (erasable under UV lamp) |
| Programming Interface | — | Altera MAX programming interface (parallel, pre-JTAG for this family) |
| Process | — | CMOS EPROM |
| I/O Standard | — | TTL/CMOS 5 V compatible |