EPM5192JC2 vs EPM5192GC84-1 比較
詳細な並列比較: EPM5192JC2 メーカー: Intel および EPM5192GC84-1 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM5192JC2 | EPM5192GC84-1 |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $15.90 | $14.20 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 12 | — |
| Usable Gates (equivalent) | 6000 | — |
| Maximum User I/O | 64 | — |
| Dedicated Inputs | 7 | 7 |
| External Clock Inputs | 1 (with shared input/clock capability) | — |
| 最大クロック周波数 | 50 MHz | 50 MHz |
| Propagation Delay (tPD) | 45 ns (speed grade -2) | 40 ns (speed grade -1) |
| Process Technology | CMOS, UV-erasable | — |
| Interconnect | Programmable Interconnect Array (PIA) | — |
| パッケージ | PLCC-68 (JC) | 84-pin PGA (Pin Grid Array), WPGA code |
| 実装タイプ | Surface Mount (socketable PLCC) | Through-hole (PGA socket) |
| Programming | Altera Master Programmer / ByteBlaster via JTAG-style interface | — |
| Product Type | — | UV-Erasable/OTP Complex PLD (CPLD) |
| Technology | — | CMOS (EPROM-cell based) |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V |
| User I/O Pins | — | 64 |
| Total Inputs / Outputs | — | 72 inputs / 64 outputs |
| Architecture | — | Shared input/clock and shared product terms |
| Temperature Grade | — | Commercial |
| RoHS ステータス | — | Compliant (per third-party distributor listing) |
| Programming Method | — | UV erasure (quartz window) + EPROM programmer |
| Logic Element Type | — | Macrocells with AND/OR array |