EPM5192LC vs EPM5192LC-2 比較
詳細な並列比較: EPM5192LC メーカー: Altera および EPM5192LC-2 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM5192LC | EPM5192LC-2 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $28.40 | $7.95 |
| Family | MAX 7000S | MAX 5000 |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 12 | 12 |
| User I/O Pins | 64 | 64 |
| Dedicated Inputs | 7 | — |
| Global Clock Inputs | 1 | — |
| Propagation Delay (tPD) | 55 ns (typical, commercial) | 45 ns (typical, -2 speed grade) |
| Maximum Clock Frequency (fMAX) | 50 MHz | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (nominal 5 V) | — |
| Process Technology | CMOS, UV-erasable/OTP EPROM configuration | CMOS |
| Programmable Interconnect | Programmable Interconnect Array (PIA), fixed delay | — |
| Boundary-Scan Support | JTAG IEEE 1149.1 | — |
| Programming Interface | JTAG (ByteBlaster-compatible) | — |
| Operating Temperature (commercial) | 0C to +70C | — |
| パッケージ | JLCC-68 (windowed ceramic, LC suffix) | PQCC-84 (PLCC-84, J-lead, surface mount) |
| 実装タイプ | Surface Mount | — |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: pre-RoHS legacy part — likely non-RoHS] |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Dedicated Input Pins | — | 7 |
| External Clock Inputs | — | 1 |
| Maximum Internal Frequency | — | 50 MHz |
| Interconnect | — | Programmable Interconnect Array (PIA) |
| Programming | — | Non-volatile (EPROM/EEPROM-based, in-system programmable via JTAG) |
| 動作温度 | — | [DATA_NEEDED: commercial/industrial/military grade] |
| 電源電圧 | — | 5 V (typical MAX 5000 family) |