EPM5192LC vs EPM5192LC-45 比較
詳細な並列比較: EPM5192LC メーカー: Altera および EPM5192LC-45 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM5192LC | EPM5192LC-45 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $28.40 | $24.00 |
| Family | MAX 7000S | MAX 5000 |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 12 | — |
| User I/O Pins | 64 | — |
| Dedicated Inputs | 7 | [DATA_NEEDED: dedicated input count] |
| Global Clock Inputs | 1 | — |
| Propagation Delay (tPD) | 55 ns (typical, commercial) | — |
| Maximum Clock Frequency (fMAX) | 50 MHz | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (nominal 5 V) | — |
| Process Technology | CMOS, UV-erasable/OTP EPROM configuration | — |
| Programmable Interconnect | Programmable Interconnect Array (PIA), fixed delay | — |
| Boundary-Scan Support | JTAG IEEE 1149.1 | — |
| Programming Interface | JTAG (ByteBlaster-compatible) | — |
| Operating Temperature (commercial) | 0C to +70C | — |
| パッケージ | JLCC-68 (windowed ceramic, LC suffix) | — |
| 実装タイプ | Surface Mount | Surface Mount (LCC) |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Series | — | EPM5192 |
| Logic Elements | — | 192 macrocells |
| Maximum Operating Frequency | — | 100 MHz |
| Pin-to-Pin Delay (tPD) | — | 45 ns |
| Programmable I/O Pins | — | [DATA_NEEDED: I/O pin count] |
| Configuration Memory | — | UV-erasable EPROM / OTP |
| Technology | — | EPROM-based CMOS |
| Package Type | — | LCC (Leaded Ceramic Chip Carrier) with UV window |
| Package Code | — | LC |
| Speed Grade | — | -45 (45 ns tPD) |
| 動作温度 | — | 0C to +70C (commercial) |
| 電源電圧 | — | 5 V |
| Datasheet Page Count | — | 52 pages |