EPM5192LC84-1 vs EPM5192JC-1 比較
詳細な並列比較: EPM5192LC84-1 メーカー: Altera および EPM5192JC-1 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM5192LC84-1 | EPM5192JC-1 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $21.85 | $22.40 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | EPLD (UV-Erasable / OTP Complex PLD) | CPLD - Complex Programmable Logic Device |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 16 | — |
| Usable Gates | 7,500 | 3750 |
| Speed Grade | -1 | — |
| Propagation Delay (tPD) | [DATA_NEEDED: tPD ns value] | 40 ns (speed grade -1) |
| Supply Voltage (VCC) | 5 V | 4.75 V to 5.25 V |
| Program Memory Type | UV-EPROM / OTP | — |
| パッケージ | 84-pin PLCC (LC84) | — |
| 実装タイプ | Surface Mount (J-lead) | — |
| 動作温度 | 0C to +70C (commercial) | 0 C to +70 C (commercial) |
| I/O Count | [DATA_NEEDED: I/O pin count] | — |
| RoHS ステータス | [DATA_NEEDED: not stated in provided data] | — |
| Process Technology | CMOS EPROM | — |
| Technology | — | CMOS, UV-Erasable / OTP |
| Maximum Internal Frequency (fMAX) | — | 62.5 MHz |
| User I/O Pins | — | 84 |
| Package Type | — | 84-pin Ceramic Quad Flat Pack (CQFP), windowed |
| JEDEC Package Code | — | S-CQCC-J84 |
| Configuration Memory | — | UV-EPROM (erasable under UV lamp) |
| Programming Interface | — | Altera MAX programming interface (parallel, pre-JTAG for this family) |
| Process | — | CMOS EPROM |
| I/O Standard | — | TTL/CMOS 5 V compatible |