EPM570GF100C5N vs EPM570M100C5N 比較
詳細な並列比較: EPM570GF100C5N メーカー: Altera および EPM570M100C5N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM570GF100C5N | EPM570M100C5N |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $11.65 | $11.85 |
| Device Family | MAX II | — |
| Logic Elements | 570 | 570 |
| Macrocells | 440 | — |
| User I/Os | 76 | 76 |
| Propagation Delay (tPD) | 5.4 ns | — |
| パッケージ | 100-LBGA (FBGA-100), 11 x 11 mm, 1.0 mm pitch | 100-MBGA (FineLine BGA, 6 x 6 mm, 0.5 mm pitch) |
| Configuration Memory | On-chip Flash (non-volatile) | — |
| Core Voltage | 1.8 V (internal) | — |
| I/O Voltage Support | 1.8 V / 2.5 V / 3.3 V (5.0 V tolerant inputs) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) |
| 動作温度 | -40C to +125C (industrial) | — |
| 実装タイプ | Surface Mount | Surface Mount (BGA) |
| Programming Interface | IEEE 1532 / JTAG (IEEE 1149.1) ISP | JTAG (IEEE 1149.1) and ISP |
| RoHS ステータス | Compliant (lead-free) | Lead-Free / Compliant |
| Logic Family / Process | CMOS, Flash-based LUT | — |
| LABs | 4 (16 macrocells per LAB) | — |
| Family | — | MAX II |
| Series | — | EPM570 |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocell Count | — | 440 |
| Number of Logic Blocks / Array Blocks | — | [DATA_NEEDED: number of LABs] |
| ピン数 | — | 100 |
| Maximum Frequency (fMAX) | — | 201.1 MHz |
| Pin-to-Pin Propagation Delay | — | 5.4 ns |
| Operating Supply Voltage (Core) | — | 2.5 V / 3.3 V |
| On-Chip User Flash Memory (UFM) | — | 8 Kbits |
| Process Technology | — | 0.18 um, 6-layer-metal flash |
| 動作温度範囲 | — | 0 C to +85 C (Commercial) |
| Moisture Sensitivity Level | — | [DATA_NEEDED: MSL level] |