EPM570GT100C3N vs EPM570GT100C4 比較
詳細な並列比較: EPM570GT100C3N メーカー: Altera および EPM570GT100C4 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM570GT100C3N | EPM570GT100C4 |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $12.90 | $17.25 |
| Family | MAX II | — |
| Series | MAX II G (Green) | MAX II |
| Logic Elements | 570 | — |
| Macrocells | 440 | — |
| User I/O Pins | 76 | 100 |
| User Flash Memory | 8 Kbits | — |
| Propagation Delay (tPD max) | 5.4 ns | — |
| Core Voltage (VCCINT) | 1.71 V to 1.89 V (1.8 V typical) | — |
| I/O Voltage Standards | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | — |
| Process Technology | 0.18 um | — |
| 動作温度 | 0C to 85C (TJ, commercial) | 0C to +85C (Commercial Extended) |
| パッケージ | 100-pin TQFP (14x14 mm) | 100-pin TQFP (14x14 mm) |
| 実装タイプ | Surface Mount | Surface Mount |
| Programmable Type | In-System Programmable (Flash, non-volatile) | In-System Programmable (ISP) via JTAG |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | — |
| RoHS ステータス | Lead free / RoHS Compliant | [DATA_NEEDED: RoHS compliance status] |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Elements (LE) | — | 570 |
| Macro Cells | — | 440 |
| Pin-to-Pin Delay (tPD) | — | 5.4 ns |
| Internal Operating Frequency | — | Up to 304 MHz |
| Internal Supply Voltage (VCCINT) | — | 1.71 V to 1.89 V |
| I/O Supply Voltage (VCCIO) | — | 2.5 V / 3.3 V (MultiVolt) |
| User Flash Memory (UFM) | — | 8 Kbits |
| Configuration Memory | — | Non-volatile flash (no external PROM required) |