EPM7096LI68-15 vs EPM7096LC84-15 比較
詳細な並列比較: EPM7096LI68-15 メーカー: Intel および EPM7096LC84-15 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM7096LI68-15 | EPM7096LC84-15 |
|---|---|---|
| ブランド | Intel | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | ラストバイ | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $9.85 | $9.85 |
| Family | MAX 7000 (second-generation MAX architecture) | MAX 7000 |
| Macrocells | 96 | — |
| Logic Array Blocks (LABs) | 4 | 4 |
| User I/O Pins | 52 | 68 (36 per LAB, [DATA_NEEDED: exact LAB-level split]) |
| Propagation Delay (tPD) | 15 ns | — |
| Supply Voltage (VCCINT) | 5.0 V | — |
| Programmable Logic Type | EEPROM-based, in-system programmable (ISP) | — |
| Programming Interface | IEEE Std. 1149.1 JTAG | IEEE Std. 1149.1 JTAG |
| Boundary-Scan Test (BST) | Built-in JTAG BST circuitry | — |
| Output Option | Open-drain output option available | — |
| Operating Temperature Grade | Industrial (-40C to +85C) | — |
| パッケージ | 68-pin PLCC (J-lead, QCCJ) | — |
| 実装タイプ | Surface Mount (J-lead) | Surface Mount |
| Speed Grade | -15 (15 ns tPD) | — |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Process Technology | CMOS EEPROM | — |
| Series | — | MAX 7000 (second-generation MAX architecture) |
| Macro Cells | — | 96 |
| Usable Gates | — | 1,800 |
| Pin-to-Pin Propagation Delay (tPD) | — | 15 ns |
| Maximum Operating Frequency | — | 76.9 MHz |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V |
| Programmable Type | — | EE PLD (in-system programmable via JTAG) |
| 動作温度 | — | 0C to +70C (commercial) |
| パッケージ / ケース | — | 84-PLCC (J-Lead) |
| Supplier Device Package | — | 84-PLCC (29.31 x 29.31 mm) |
| Data Retention | — | [DATA_NEEDED: data retention years] |
| Erase/Program Endurance | — | [DATA_NEEDED: erase/program cycle count] |