EPM7128AEFC100-5 vs EPM7128AETC100-10N 比較
詳細な並列比較: EPM7128AEFC100-5 メーカー: Altera および EPM7128AETC100-10N メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Intel
EPM7128AETC100-10N - MAX 7000AE 128-Macrocell CPLD | Intel | TQFP-100
EPM7128AETC100-10N Obsolete仕様比較
| パラメータ | EPM7128AEFC100-5 | EPM7128AETC100-10N |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | 有効 | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $79.50 | $9.95 |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Family | MAX 7000A | MAX 7000AE |
| Logic Family / Base Number | EPM7128A | — |
| Macrocells | 128 | 128 |
| Usable Gates | 2,500 | 2500 |
| Propagation Delay (tPD) | 5 ns | — |
| Internal Frequency (fMAX) | 192.3 MHz | — |
| User I/Os | 84 | 84 |
| Logic Family | CMOS | — |
| 電源電圧 | 3.3 V | — |
| パッケージ | 100-ball FBGA (FineLine BGA) | TQFP-100 |
| ピン数 | 100 | — |
| 実装タイプ | Surface Mount | Surface Mount |
| Programmable Type | EEPROM (In-System Programmable) | — |
| 動作温度 | 0C to +70C (Commercial) | 0C to +70C (commercial) |
| JTAG Support | Yes (IEEE 1149.1 Boundary Scan) | — |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | — |
| Series | — | EPM7128AE |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Array Blocks | — | 16 |
| Supply Voltage (Core) | — | 3.3 V |
| I/O Tolerance | — | 5.0 V tolerant |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Speed Grade | — | -10 |
| Maximum Frequency | — | [DATA_NEEDED: maximum toggle frequency] |
| Programming | — | JTAG (IEEE 1149.1) ISP / EEPROM |
| Lead-Free / RoHS | — | Yes (N suffix) |
| Process Technology | — | CMOS EEPROM |
| Architecture | — | Multiple Array MatriX (MAX) - 2nd generation |
| PCI Compliance | — | Yes (33 MHz, -10 grade per PCI SIG 2.2) |